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Electronics Engineering VLSI Design
And Technology Department

Designing and building sustainable infrastructure for a better tomorrow.

Electronics Engineering VLSI Design And Technology

Level: Under Graduate

Intake : 60 Seats

Assessment Pattern: Semester

Study Mode: Full Time (4 Years)

Location: Sr.No. 25 &27,Kondhwa-Saswad Road,Bopdev Ghat, Pune

About the Department

The department of VLSI Design and Technology was established in 2023 with the intake of 60 students for UG program. The department's goal is to create globally competent, VLSI-based professionals who can take on difficulties and provide larger-scale solutions to societal issues. The Department has qualified and experienced faculty in all the related fields of VLSI to open a wide range of career opportunities in various fields of VLSI design, chip design, fabrication, and testing. Emerging technologies like Artificial Intelligence (AI),5G, the Internet of Things (IoT) and autonomous vehicles rely heavily on VLSI solutions. The VLSI group primarily focuses on large-scale circuit and device integration technologies, mainly VLSI, ULSI, WSI, SoC, and 3D-IC. These technologies combine billions of transistors onto a single semiconductor chip to create integrated circuits (ICs). The brains of today's electronics are these integrated circuits. They make possible developments in emerging technologies such as Machine Learning (ML), Artificial Intelligence (AI), Virtual Reality (VR), communications, computers, health care, defense, transportation, wireless sensor networks, and clean energy (IoT). Over the last two decades, the industry has quickly moved from 180 nm technological nodes to sub-10 nm nodes today. An interdisciplinary approach combining electronics, applied physics, material science, etc., is required to describe the behavior and performance of devices with dimensions smaller than 50 nm, as traditional electronic models are no longer able to do so. The science and technology outlined above for creating incredibly small electronic components and integrated circuit systems collectively for the development of future Nano-electronics.

Explore Our Programs

As the head of the VLSI Design and Technology department, I take pride in leading a group of people that are dedicated to the highest standards of semiconductor design and innovation. Our department focuses on imparting cutting-edge knowledge in VLSI technology, fostering creativity, and enhancing skills for the rapidly evolving electronics industry. We provide students with hands-on experience in the latest design tools and methodologies, preparing them for real-world challenges. Our aim is to nurture leaders in the VLSI field who will drive technological advancements. Together, we are shaping the future of electronics and empowering students to excel in this dynamic industry.

Dr. Sunita Deshmukh
HoD

The VLSI group primarily focuses on large-scale circuit and device integration technologies, mainly VLSI, ULSI, WSI, SoC, and 3D-IC. These technologies combine billions of transistors onto a single semiconductor chip to create integrated circuits (ICs). The brains of today's electronics are these integrated circuits. They make possible developments in emerging technologies such as Machine Learning (ML), Artificial Intelligence (AI), Virtual Reality (VR), communications, computers, health care, defense, transportation, wireless sensor networks, and clean energy (IoT).

Over the last two decades, the industry has quickly moved from 180 nm technological nodes to sub-10 nm nodes today. An interdisciplinary approach combining electronics, applied physics, material science, etc., is required to describe the behavior and performance of devices with dimensions smaller than 50 nm, as traditional electronic models are no longer able to do so. The science and technology outlined above for creating incredibly small electronic components and integrated circuit systems collectively for the development of future Nano-electronics.

Department Objectives

Vision

“To integrate the academic excellence and research of VLSI technology in computing devices, autonomous industry and communication world”

Mission

  • M.1 –To impart strong theoretical and practical knowledge in VLSI, semiconductor devices and emerging technologies through academic excellence.
  • M.2 –To equip students with technical and professional skills necessary to meet global industry standard through hands on training, internship and industry interactions.
  • M.3 –To nurture ethically responsible professionals who are committed to sustainable technological advancement and contributing to society.

Programme Outcomes (POs)

  • PO1 – Engineering Knowledge: Apply the knowledge of mathematics, science, engineering fundamentals and an engineering specialization to the solution of complex engineering problems.
  • PO2 – Problem Analysis: Identify, formulate, review research literature, and analyze complex engineering problems reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering sciences.
  • PO3 – Design / Development of Solutions: Design solutions for complex engineering problems and design system components or processes that meet the specified needs with appropriate consideration for the public health and safety, and the cultural, societal, and environmental considerations.
  • PO4 – Conduct Investigations of Complex Problems: Use research-based knowledge and research methods including design of experiments, analysis and interpretation of data, and synthesis of the information to provide valid conclusions.
  • PO5 – Modern Tool Usage: Create, select and apply appropriate techniques, resources, and modern engineering and IT tools including prediction and modeling to complex engineering activities with an understanding of the limitations.
  • PO6 – The Engineer and Society: Apply reasoning informed by the contextual knowledge to assess societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering practice.
  • PO7 – Environment and Sustainability: Understand the impact of the professional engineering solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable development.
  • PO8 – Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the engineering practice.
  • PO9 – Individual and Team Work: Function effectively as an individual, and as a member or leader in diverse teams, and in multidisciplinary settings.
  • PO10 – Communication Skills: Communicate effectively on complex engineering activities with the engineering community and with society at large, such as, being able to comprehend and write effective reports and design documentation, make effective presentations, and give and receive clear instructions.
  • PO11 – Project Management and Finance: Demonstrate knowledge and understanding of the engineering and management principles and apply these to one’s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments.
  • PO12 – Life-long Learning: Recognize the need for, and have the preparation and ability to engage in independent and life-long learning in the broadest context of technological change.

Program Educational Objectives

The PEOs of undergraduate program in Computer Engineering are broadly classified as follows:

  • PEO1 – To produce globally qualified graduates with strong fundamentals, expertise in their fields, and recent knowledge of modern technologies who are able to resolve problems in engineering.
  • PEO2 – To use extracurricular and co-curricular activities to open doors to higher education and enterprise.
  • PEO3 – To nurture an attitude of teamwork and professional ethics for sustainable growth.

Programme Specific Outcomes

  • PSO1 – To enhance employability skills in the area of VLSI Design and Technology.
  • PSO2 – To improve the development of electronic systems using modern Hardware and software engineering tools.
  • PSO3 – To work ethically and professionally in the areas of electronics engineering to accomplish the societal needs.
Dr. Sunita Punjaji Deshmukh

Dr. Sunita Punjaji Deshmukh

Designation: H.O.D

Qualification: PhD

Profile: View PDF

Prof. Rahimraja Shaikh

Prof. Rahimraja Shaikh

Designation: Assistant Professor

Qualification: Ph.D. (Pursuing), M. Tech. (Digital Electronics & Communication)

Profile: View PDF

Prof. Pooja Pawar

Prof. Pooja Pawar

Designation: Assistant Professor

Qualification: M.Tech (ECE)

Profile: View PDF

Prof. Ajit Suryawanshi

Prof. Ajit Suryawanshi

Designation: Assistant Professor

Qualification: M.Tech. Solid State Technology

Profile: View PDF

Prakash Pandurang Malvadkar

Prakash Pandurang Malvadkar

Designation: Teaching Assistant

Qualification: ME Electronics

Profile: View PDF

Toppers List


Project Winner


Achievements

Sr. No. Name of Faculty Name of Journal Title Vol Issue ISSN Year
1 Dr. Sunil Kumar Gaddam Electric Power Components and Systems Power control and optimization for power loss reduction using deep learning in microgrid systems 52 2 1532-5008 2022
2 Dr. Sunil Kumar Gaddam International journal of computers communications & control Optimized CNN-based brain tumor segmentation and classification using artificial bee colony and thresholding 18 1 1841-9844 2023
3 Dr. Sunil Kumar Gaddam IEEE An Overview of Low-Power VLSI Design Methods for CMOS and CNTFET-Based Circuits 2023
4 Dr. Sunil Kumar Gaddam Turkish Journal of Physiotherapy and Rehabilitation ANC Based On Variable Step Size Normalised Differential LMS Algorithm 32 2 2651-4451 2021
5 Dr. Sunil Kumar Gaddam Journal of Automation, Mobile Robotics and Intelligent Systems Automatic detection of brain tumors using genetic algorithms with multiple stages in magnetic resonance images 16 4 1897-8649 2022
6 Dr. Sunil Kumar Gaddam IEEE Fungus Detection System Built in an Efficient and Modest Embedded System 2022
7 Dr. Sunil Kumar Gaddam International Journal of Mechanical Engineering Enhancement of Speech Signal by Using Variable Step Size Normalized Differential LMS (VSSNDLMS) Algorithm 7 4 0974-5823 2022
8 Dr. Sunil Kumar Gaddam International Journal of Mechanical Engineering A Novel Noise Reduction Framework for Speech Signals in Adaptive Channels Using Variable Step Size Normalized Differential LMS (VSSNDLMS) Algorithm 7 2 0974-5824 2022
9 Dr. Shaveta Thakral Bulletin of Electrical Engineering and Informatics Improved Ant Colony Optimization for Quantum Cost Reduction 9 4 2089-3191 2020
10 Dr. Shaveta Thakral International Journal of Electrical and Computer Engineering High Functionality Reversible Arithmetic Logic Unit 10 3 2088-8708 2020
11 Dr. Shaveta Thakral International Journal of Advanced Science and Technology Performance Evaluation of Image Registration Using Multiple Novel Algorithms 29 5 2005-4238 2020
12 Dr. Shaveta Thakral Telecommunication, Computing, Electronics and Control (Telkomnika) Novel High Functionality Fault Tolerant ALU 18 1 1693-6930 2020
13 Dr. Shaveta Thakral TELKOMNIKA (Telecommunication Computing Electronics & Control) Implementation and Analysis of Reversible Logic Based ALU 14 4 1693-6930 2016

Departmental Activities

Research & Publication- (Conference Publication)

Sr. No. Name of Faculty Name of Journal Title Vol Issue ISSN Year
1 Dr.Sunil Kumar Gaddam Electric Power Components and Systems Power control and optimization for power loss reduction using deep learning in microgrid systems 52 2 1532-5008 2022
2 Dr.Sunil Kumar Gaddam International journal of computers communications & control Optimized cnn-based brain tumor segmentation and classification using artificial bee colony and thresholding 18 1 1841-9844 2023
3 Dr.Sunil Kumar Gaddam IEEE An Overview of Low-Power VLSI Design Methods for CMOS and CNTFET-Based Circuits 2023
4 Dr.Sunil Kumar Gaddam Turkish Journal of Physiotherapy and Rehabilitation Anc Based On Variable Step Size Normalised Differential LMS Algorithm 32 2 2651-4451 2021
5 Dr.Sunil Kumar Gaddam Journal of Automation, Mobile Robotics and Intelligent Systems Automatic detection of brain tumors using genetic algorithms with multiple stages in magnetic resonance images 16 4 1897-8649 2022
6 Dr.Sunil Kumar Gaddam IEEE Fungus Detection System Built in an Efficient and Modest Embedded System 2022
7 Dr.Sunil Kumar Gaddam International Journal of Mechanical Engineering ENHANCEMENT OF SPEECH SIGNAL BY USING VARIABLE STEP SIZE NORMALIZED DIFFERENTIAL LMS (VSSNDLMS) ALGORITHM 7 4 0974-5823 2022
8 Dr.Sunil Kumar Gaddam International Journal of Mechanical Engineering A NOVEL NOISE REDUCTION FRAMEWORK FOR SPEECH SIGNALS IN ADAPTIVE CHANNELS USING VARIABLE STEP SIZE NORMALIZED DIFFERENTIAL LMS (VSSNDLMS) ALGORITHM 7 2 0974-5824 2022
9 Dr.Shaveta Thakral Bulletin of electrical engineering and informatics Improved Ant Colony optimization for quantum cost reduction 9 4 2089-3191 2020
10 Dr.Shaveta Thakral International journal of electrical and computer engineering High Functionality Reversible Arithmetic Logic Unit 10 3 2088-8708 2020
11 Dr.Shaveta Thakral International Journal of Advanced Science and Technology Performance Evaluation of Image Registration Using Multiple Novel Algorithms 29 5 2005-4238 2020
12 Dr.Shaveta Thakral Telecommunication, Computing, Electronics and Control (Telkomnika) Novel High Functionality Fault Tolerant ALU 18 1 1693-6930 2020
13 Dr.Shaveta Thakral TELKOMNIKA (Telecommunication computing Electronics & Control) Implementation and Analysis of Reversible Logic Based ALU 14 4 1693-6930 2016

Result Analysis

Toppers List


SIH 2025

SIH-2025 Participation of VLSI D & T Department Students on 19/09/25

SIH 2025

SIH-2025 Participation of VLSI D & T Department Students on 19/09/25

SIH 2025

SIH-2025 Participation of VLSI D & T Department Students on 19/09/25

AV 2025

AVISHKAR-2025 Participation of VLSI D & T Department Students on 19/09/25

AV 2025

AVISHKAR-2025 Participation of VLSI D & T Department Students on 19/09/25

AV 2025

AVISHKAR-2025 Participation of VLSI D & T Department Students on 19/09/25

visit

Industrial Visit at MINILEC, Pune On 15/09/25

visit

Industrial Visit at MINILEC, Pune On 15/09/25

visit

Industrial Visit at MINILEC, Pune On 15/09/25

quiz

Subject Specific Quiz Activity on 12/09/25

quiz

Subject Specific Quiz Activity on 12/09/25

quiz

Subject Specific Quiz Activity on 12/09/25

VR

Artificial Reality & Virtual Reality Workshop on 02/08/25

VR

Artificial Reality & Virtual Reality Workshop on 02/08/25

VR

Artificial Reality & Virtual Reality Workshop on 02/08/25

poster

Poster Presentation on University Exemplars Session on 25/07/25

poster

Poster Presentation on University Exemplars Session on 25/07/25

poster

Poster Presentation on University Exemplars Session on 25/07/25

gate

GATE Opportunities & Orientation Lecture Session on 21/07/25

gate

GATE Opportunities & Orientation Lecture Session on 21/07/25

gate

GATE Opportunities & Orientation Lecture Session on 21/07/25

CS

Student Counselling Session: Explaining Department Activities & Plans by HOD on 17/07/25

CS

Student Counselling Session: Explaining Department Activities & Plans by HOD on 17/07/25

CS

Student Counselling Session: Explaining Department Activities & Plans by HOD on 17/07/25

Academic Calendrer Sem II 24-25


Time Table SEM-II


Syllabus SE VLSI


Question Paper & Solution


Question Paper Solution


Question Paper Solution


Syllabus SE VLSI


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